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 SPW4558D
Dual Operational
Elektronische Bauelemente
RoHS Compliant Product
Amplifier
DIP-8
Description
The SPW4558D is a monolithic integrated circuit designed for dual operational amplifier.
E
D
GAUGE PLANE
Features
* Low Noise Input Transistors * Large Common Mode And Differential Voltage Range
A
* No Latch-Up * Gain And Phase Match Between Amplifiers * Internally Frequency Compensated * No Frequency Compensated Required * Parameter Tracking Over Temperature Range
REF. A A1 A2 b b1 b2 b3 c Millimeter Min. Max.
b e
SEATING PLANE Z Z
b
L
SECTION Z - Z
REF. c1 D E E1 e HE L
0.381 2.921 0.356 0.356 1.143 0.762 0.203
0.5334 4.953 0.559 0.508 1.778 1.143 0.356
0.203 0.279 9.017 10.16 6.096 7.112 7.620 8.255 2.540 BSC 10.92 2.921 3.810
Millimeter Min. Max.
Pin Configurations
Block Diagram
rogrammed by pacitor CT to ground .Operation 500kHz nts up to
This is the reference output .It provides charging current for capacitor CT
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
c
Page 1 of 4
SPW4558D
Elektronische Bauelemente
Dual Operational Amplifier
Absolute Maximum Ratings at Ta = 25 :
Parameter Supply Voltage Differential Input Voltage Input Voltage Power Dissipation Operating Temperature Range Storage Temperature Range Symbol VCC VI(DIFF) VI PD TOPR TSTG VALUE 22 18 15 600 0 ~ +70 -65 ~ +150 Unit V V V mW : :
Electrical Characteristics (VCC=15V Vee=-15V, TA=25 : )
Parameter SYMBOL Test Conditions Supply Current, all Amp, ICC no load Input Offset Voltage VIO RS<10k IIO Input Offset Current IBIAS Input Bias Current Common Mode Input Voltage VI(R) Large Signal Voltage Gain GV VO(P-P)=10V, RL 2k Output Voltage Swing VO(P-P) RL 10k Common Mode Rejection Ratio CMRR RS 10k Supply Voltage Rejection Ratio PSRR RS 10k Power Consumption PC Vi=10V, RL 2k , Slew Rate SR CL 100pF Vi=20mV, RL 2k , Rise Time TRIS CL 100pF Vi=20mV, RL 2k , Overshoot OS CL 100pF Input Resistance Ri Output Resistance RO f=1kHz, AV=20dB, RL=2k , Total Harmonic Distortion THD VO= 2VPP, CL=100pF Channel Separation VO1/VO2
Min 12 20 70 76 1.2 0.3 -
Typ. 2.3 2 5 30 13 200 12 90 90 70 2.2 0.3 15 2 75 0.008 120
Max 4.5 6 200 500 14 170 -
Unit mA mV nA nA V V/mV V dB dB mV V/ s s % M % dB
Frequency Characteristics (VCC=15V Vee=-15V, TA=25 : )
Parameter Unity Gain Bandwidth SYMBOL BW
(UVLO)
Test Conditions
Min 2.0
Typ. 2.8
Max -
Unit MHz
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 2 of 4
SPW4558D
Elektronische Bauelemente
Dual Operational Amplifier
Typical Performance Characteristics
(UVLO)
Fig 1. Burst Noise vs. Rs
Fig 2. RMS Noise vs. Rs
Fig 3. Output Noise vs. Rs
Fig 4. Spectral Noise vs. Density
Fig 5. Open Loop Frequency Response
ht tp://www.SeCoSGmbH.com/
Fig 6. Phase Margin vs. Frequency
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 3 of 4
SPW4558D
Elektronische Bauelemente
Dual Operational Amplifier
Fig 7. Positive Output Voltage Swing vs. Load Resistance
Fig 8. Power Bandwidth (Large Signal)
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 4 of 4


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